Author Archives: Anonymous
9. In this problem you will design a series of MUX devices….
9. In this problem you will design a series of MUX devices. a) Draw a functional block diagram for a 2-input MUX with active-low enable (labeled E). Use the following labels: select lines Sa, and inputs Xb (with the normally used subscripts), and output Y. All Sa, Xb, and Y are active-high. b) Design a circuit using only SSI gates to implement this MUX. c) Draw a functional block diagram for a 4-input MUX with active-low enable (labeled E). Use the following labels: select lines Sa, and inputs Xb (with the normally used subscripts), and output Y. All Sa, Xb, and Y are active-high. d) Design a the 4-input MUX from part c using a minimum number of 2-input MUX devices (as drawn in part a) and no other device. (If necessary, also use SSI gates for much less credit.) e) Assume that you have 2-input MUX devices that have the same functional block diagram as the one in part a, except that for each 2-input MUX the enable can be either active-high or active-low and the enable is now a tri-state enable. Design a 4-input MUX (with no enable) from a minimum number of these 2-input MUX devices and no other devices. Each 2-input MUX can have either activation-level for its tri-state enable. (If necessary, also use SSI gates for much less credit.)
Read Details