PANCREAS:  In the homeostatic regulation of glucose, the alpha cells of the endocrine pancreas function as the…

CHEETAH: A cheetah is stalking its prey. After standing still for several minutes, it quickly leaps after the prey and begins to run after it. Proprioceptor neurons in the muscles and joints of the legs sense the change in the position of the legs relative to the body, and convey signals to the motor cortex of the brain within 3 milliseconds of the start of the run. Signals are then relayed back to the muscles, but also to cardiovascular control centers in the brain which stimulate increases in heart rate, stroke volume and breath rate. These changes result in increased oxygen distribution to exercising tissues before the rate of oxygen use by the exercising tissues increases. The controlled variable(s) in this case is/are…

BLOOD FLOW:  Which of the following would DECREASE blood flow the most?

Foggy single sighting (reported pink): Z=1, baseline priors. Compute P (RS | Z=1) with flip noise ε = 0.1.

Spin The context for this question is the same as the previous question. [6 points] Your friend — having not read a research paper in 3 years — is struggling to understand the specific benefits SPIN provided in the “Extensibility, Safety and Performance in the SPIN Operating System” paper that was assigned. He was hoping you could briefly describe (in a sentence or two) each attribute listed in title of the paper, since the paper’s title was the only part that really stuck with him. c) [2 points] How is SPIN performant? 

Microkernel The context for this question is the same as the previous question. You are building an OS using a microkernel-based approach following the principles of the L3 microkernel. The processor architecture you are building this OS for has the following features:  A 32-bit hardware address space.  Paged virtual memory system (8KB pages) with a processor register called PTBR that points to the page table in memory to enable hardware address translation.  A TLB that doesn’t support tagging entries with address space IDs  A pair of hardware-enforced segment registers (lower and upper bound of virtual addresses) which limit the virtual address space that can be accessed by a process running on the processor.  A virtually-indexed physically tagged processor cache.  You end up with the following subsystems that each need to be a separate protection domain.  A: 2^30 bytes  B: 2^30 bytes  C: 100 * 2^20 bytes  D: 500 * 2^20 bytes  E: 1000 * 2^20 bytes  F: 2000 * 2^20 bytes These subsystems are packed into two hardware address spaces: protection domains A and B in the first; and protection domains C, D, E, and F in the second. Based on this grouping, answer the following questions. [2 points] There is a context switch from A to C. What does your OS do to facilitate this context switch?

Compute posterior: P (C2 | x)

Exokernel 1. [4 points] A library OS “B”, on top of Exokernel experiences memory pressure and needs additional physical memory. Exokernel decides to revoke 20 physical page frames from library OS “A” to service this request. Describe how Exokernel can revoke the physical page frames from library OS “A” and how library OS “A” will respond.

Spin The context for this question is the same as the previous question. [6 points] Your friend — having not read a research paper in 3 years — is struggling to understand the specific benefits SPIN provided in the “Extensibility, Safety and Performance in the SPIN Operating System” paper that was assigned. He was hoping you could briefly describe (in a sentence or two) each attribute listed in title of the paper, since the paper’s title was the only part that really stuck with him. b) [2 points] How is SPIN safe? 

Paravirtualization [5 points]  You are launching an application inside a para virtualized VM. Your expectation is that your application will have memory isolation and protection from other applications on the same VM.  With succinct bullets, explain how this expectation is fulfilled.