Consider the MIPS 5stage pipeline datapath and control figur…
Consider the MIPS 5stage pipeline datapath and control figure shown below. For this problem, you need to fill the number of bits and the value for each field of the ID/EX pipeline register shown on the right table and on the figure below when “and $2,$8,$10” instruction is decoded at the ID pipeline stage. IMPORTANT: You must copy the ID/EX Pipeline Register table shown on the right to into your answer box and you must answer for each value from (a1) to (n2). If a particular field’s value will not affect the result, then place an ’X’ in the value field. If needed, you can reference MIPS Green Sheet. ID/EX Pipeline Register # BITs VALUE Name of signals WB (a1) (a2) RegWrite WB (b1) (b2) MemtoReg MEM (c1) (c2) MemRead MEM (d1) (d2) MemWrite EX (e1) (e2) ALUSrc EX 2 00 ALUOp EX (g1) (g2) RegDst (h1) (h2) PC+4 (i1) (i2) register 1 data (j1) (j2) register 2 data (k1) (k2) Immediate (l1) (l2) register rs (m1) (m2) register rt (n1) (n2) register rd
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