Problem 2 (20 Points): Part 1: Create a VHDL type new_array…
Problem 2 (20 Points): Part 1: Create a VHDL type new_array for a one-dimensional unconstrained array where each element is 32 bit (std_logic_vector). Part 2: Create a signal temp_array that is an instance of new_array with 100 total elements. Part 3: If I wanted to output a clock with a 100 ns period, what ratio (scaling factor) would I use if I were using the on-board 50MHz clock? What would be the value of the counter that toggles the derived clock?
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