Cache Questions

At ACME computing, a computer architect comes up with a nifty device which when added to their premier CPU speeds up division instructions by 70 percent. How much faster will a program where 20 percent of instructions are division instructions will run with this modification (as compared to the unmodified CPU)?

Say we have a snoopy MSI cache protocol. We have three processors all accessing the same block of data. This is a write-invalidate cache. Initially, they all have the block in state I. If the following accesses are performed by each CPU, what is the final state of the cache? PE1: Write PE2: Read PE3: Read PE1: Write PE2: Write PE3: Read Fill M, S or I for each processor below: PE1: [1] PE2: [2] PE3: [3]

Describe a scenario in which two instructions may be fired out of order but retired in order in the original Tomasulo algorithm.

Why does a deeper pipeline increase the need for branch prediction?

What is a downside of using tags in the original Tomasulo algorithm?

You respond to the report of a 65-year-old female patient complaining of difficulty breathing. Upon your arrival, you find the patient seated in a tripod position in moderate respiratory distress. The patient advises she has a lifetime history of asthma and cannot receive relief with her albuterol treatment. The patient, and the patient’s husband, advises she was recently diagnosed with hypertension. They both advise they cannot afford new medications, so the patient has been taking her husband’s propanolol to control her hypertension. To receive full credit, you must answer the following questions: 1. What are the receptors of the sympathetic nervous system? 2. Explain in your own words if propanolol is helping your patient or harming your patient. 3. Would your albuterol help this patient? 4. Would administering epinephrine help this patient? 5. Would Atrovent help this patient, and if so, how?

Consider the following trace for a (C,B,S)=(6,4,0) cache. A. LD 0x000AB. ST 0x001BC. ST 0x002CD. LD 0x003DE. LD 0x004EF. ST 0x005FG. LD 0x0031H. ST 0x0022I. LD 0x0043J. ST 0x0054K. LD 0x000A How many total misses are there? [tot] How many non-compulsory misses are there? [nc] How many write backs are there?  [wb]

Multiprocessing Questions

For a cache with a Hit Rate of .95, a Hit Time of 2ns, and a Miss Penalty of 200ns, what is the average access time in nanoseconds?