Problem 2: Time-borrowing (10pts) Assume tCLK2Q = 55ps; tD2Q = 100ps; tSETUP = 35ps; tHOLD = 0ps for both latches and flip-flops. For the following path to run without any timing violation, determine the maximum clock frequency it can run at. Show how you arrive at your answers. For logic delay between flip-flops and/or latches, use the following values: A = 655ps, B = 100ps, C = 300ps, D = 450ps, E = 300ps. [Write down and show how you get the answers on your solution papers.]

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