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Say we have a snoopy MSI cache protocol. We have three proce…

Say we have a snoopy MSI cache protocol. We have three processors all accessing the same block of data. This is a write-invalidate cache. Initially, they all have the block in state I. If the following accesses are performed by each CPU, what is the final state of the cache? PE1: Write PE2: Read PE3: Read PE1: Write PE2: Write PE3: Read Fill M, S or I for each processor below: PE1: [1] PE2: [2] PE3: [3]

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Describe a scenario in which two instructions may be fired o…

Describe a scenario in which two instructions may be fired out of order but retired in order in the original Tomasulo algorithm.

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Why does a deeper pipeline increase the need for branch pred…

Why does a deeper pipeline increase the need for branch prediction?

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What is a downside of using tags in the original Tomasulo al…

What is a downside of using tags in the original Tomasulo algorithm?

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You respond to the report of a 65-year-old female patient co…

You respond to the report of a 65-year-old female patient complaining of difficulty breathing. Upon your arrival, you find the patient seated in a tripod position in moderate respiratory distress. The patient advises she has a lifetime history of asthma and cannot receive relief with her albuterol treatment. The patient, and the patient’s husband, advises she was recently diagnosed with hypertension. They both advise they cannot afford new medications, so the patient has been taking her husband’s propanolol to control her hypertension. To receive full credit, you must answer the following questions: 1. What are the receptors of the sympathetic nervous system? 2. Explain in your own words if propanolol is helping your patient or harming your patient. 3. Would your albuterol help this patient? 4. Would administering epinephrine help this patient? 5. Would Atrovent help this patient, and if so, how?

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Consider the following trace for a (C,B,S)=(6,4,0) cache. A….

Consider the following trace for a (C,B,S)=(6,4,0) cache. A. LD 0x000AB. ST 0x001BC. ST 0x002CD. LD 0x003DE. LD 0x004EF. ST 0x005FG. LD 0x0031H. ST 0x0022I. LD 0x0043J. ST 0x0054K. LD 0x000A How many total misses are there? [tot] How many non-compulsory misses are there? [nc] How many write backs are there?  [wb]

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Multiprocessing Questions

Multiprocessing Questions

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For a cache with a Hit Rate of .95, a Hit Time of 2ns, and a…

For a cache with a Hit Rate of .95, a Hit Time of 2ns, and a Miss Penalty of 200ns, what is the average access time in nanoseconds?     

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Consider a 5-stage pipeline where branch behavior is known a…

Consider a 5-stage pipeline where branch behavior is known at the end of the third stage, EX.  You’re given a workload comprised of 25% branches, 10% loads, 5% stores, and 50% arithmetic. 75% of the branches are correctly predicted.  What is the average number of stall cycles for this workload, assuming there are no hazards aside from control hazards?

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A 2-row GShare predictor is shown below. It has a 2-bit GHR….

A 2-row GShare predictor is shown below. It has a 2-bit GHR. The least significant bit of the PC is used for indexing into this predictor.  GHR: 10 Index 00 01 10 11 0 10 11 10 00 1 01 01 10 10 The branch PC is 0xEEEE1206. The actual behavior is NT. The branch is predicted as [behavior] (enter T or NT).  Show the updated predictor. Only enter values that change, and enter a dash ‘-‘ (without the quotes) for entries that don’t change.  Index 00 01 10 11 0 [000] [001] [010] [011] 1 [100] [101] [110] [111] The updated GHR is [ghr]. 

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