____________ refers to the theoretical process of strengthening the stability of stored information and an example of __________ is a situation where a newly formed memory becomes stronger and more permanent over time. Fill in the blanks with the ONE appropriate word.

A put currently is traded on stock XYZ; it has strike prices of $54 and maturities of six months. What will be the profit/loss to an investor who buys the put for $6.40 in the following scenarios for stock prices in six months? (Loss amounts should be indicated by a minus sign. ) (8’)   Stock Price Value of Put at expiration Initial Cost Profit/Loss per share a 44 6.4   b 49 6.4   c 54 6.4   d 59 6.4   e 64 6.4  

Extra credit (5’) Refer to the stock options on Microsoft options presented in the figure below. Suppose you buy a November expiration call option of 100 shares with an exercise price $235. If the stock price at expiration is $246, will you exercise your call? What is the net profit/loss on your position? What is the rate of return on your position?

SPIN A friend says that he recalls that there were two major strikes against SPIN in the way it handles accessing the endpoints of object interfaces (Create(), Combine(), Resolve()). He says this results in SPIN being not performant and also unsafe due to unprotected memory access between extensions on top of SPIN.  a) [4 points] With succinct bullets,explain how SPIN creates protection domains and use this to explain to your friend whether he was correct or not with regards to 1) the performance of SPIN OS and 2) the safety in regard to the isolation of the protection domains. 

During a design review, the team is struggling to decide whether security is more important than performance. The moderator introduces a Utility Tree.What is/are the purpose of using a Utility Tree in an ATAM-style review?  

Match the ATAM phase/step to its primary objective:

M.E. Lock The context for this question is the same as the previous question. Given:  32-core cache-coherent bus-based multiprocessor  Invalidation-based cache coherence protocol  Architecture supports atomic “Test-and-set (T&S)”, atomic “Fetch-and-add (F&inc)”, and atomic “fetch-and-store (F&St)” operations. All these operations bypass the cache.  An application has 32 threads, one on each core.   ALL threads are contending for the SAME lock (L)  Each lock acquisition results in 100 iterations of the spin loop for each thread  The questions are with respect to the following spin-lock algorithms (as described in the MCS paper, and restated below for convenience):  Spin on Test-and-Set: The algorithm performs a globally atomic T&S on the lock variable “L”  Spin on Read: The algorithm, on failure to acquire the lock using T&S, spins on the cached copy of “L” until notified through the cache coherence protocol that the current user has released the lock.  Ticket Lock: The algorithm performs “fetch_and_add” on a variable “next_ticket” to get a ticket “my_ticket”. The algorithm spins until “my_ticket” equals “now_serving”.  Upon lock release, “now_serving” is incremented to let the spinning threads that the lock is now available.  MCS lock: The algorithm allocates a new queue node, links it to the head node of Lock queue using “fetch-and-store”, sets the “next” pointer of the previous lock requestor to point to the new queue node, and spins on a “got_it” variable inside the new queue node if the lock is not immediately available (i.e., the Lock queue is non-empty). Upon lock release, using the “next” pointer, the next user of the lock is notified that they have the lock.    b) [2 points] This pertains to the “Spin on Read” algorithm. One thread is in the critical section governed by the lock. All the other threads are spinning waiting their turns. How many T&S operations happen upon lock release? No credit without justification.

Potpourri Answer the following question on scheduling policy. a) [2 points] Identify a pro and a con for the fixed-processor scheduling policy. 

Tornado The context for this question is the same as the previous question. The paper shows that using multiple representations (reps) for the Process object improves page fault handling performance significantly but worsens the performance for region deletion as shown in the graphs below:   b) [1 point] Explain why region destruction takes more time.

L3 Microkernel The context for this question is the same as the previous question. You are the Lead Systems Architect for FlashTrade, a High Frequency Trading (HFT) firm. You are designing a specialized OS kernel on top of L3 microkernel to host four client trading algorithms on a single server while ensuring strict proprietary data isolation. The processor architecture you are targeting has the following features:  A 32-bit hardware address space.  Paged virtual memory system (8KB pages) with a processor register called PTBR that points to the page table in memory.  A Tagged TLB supports tagging entries with Address Space IDs (ASIDs).  A pair of hardware-enforced segment registers (base and limit) which restrict the virtual address range accessible by a process.  A virtually indexed, physically tagged processor cache.  Your system runs a shared Kernel Lib (K), which requires 512 MB, and four client protection domains. Each client runs as a user level process.  The clients use services provided by the Kernel Lib (libraries for network access, memory management, and CPU scheduling). You design the hardware address spaces for each client as follows:  Client A: Kernel Lib (512 MB) + Trading Model (2.5 GB)  Client B: Kernel Lib (512 MB) + Trading Model (2.5 GB)  Client C: Kernel Lib (512 MB) + Trading Model (1.5 GB) + Forecast Model (1.5 GB)  Client D: Kernel Lib (512 MB) + Trading Model (3 GB)   e) [2 points] Answer True/False with justification. No credit without justification. The design guarantees that the clients are protected from the Kernel.